The invention relates generally to aligning a semiconductor wafer workpiece for processing operations and, more particularly, to a method of providing etched alignment marks on a semiconductor workpiece that has a substantially planar surface, thereby supporting accurate alignment of the workpiece for subsequent process operations.
Generally, integrated circuit technology is based on the ability to form numerous transistors structures on a single semiconductor substrate (die). When forming the structures, a plurality of die are often simultaneously fabricated on a single workpiece based on a semiconductor wafer. Fabrication generally represents a predetermined sequence of processing operations, some operate on the workpiece as a whole, while others operating on one portion of the workpiece at a time. For the latter group of processing operations, in order to process a specific portion of the workpiece, a machine performing the processing operation must be able to accurately and reliably align with the desired portion, perform the processing operation, and then "step" to a next portion. By correctly aligning to the desired portion of the workpiece, the structures being created in the processing operation correctly align with underlying structures previously formed.
Alignment methods typically require the existence of several topographical alignment marks. Usually, the marks are predetermined "bumps" that appear on a top surface of the workpiece. Because the top surface of the workpiece is naturally non-planar, i.e., the surface contains numerous "ridges and valleys," many bumps are available to serve as alignment marks. As a result, the processing machines can attain very accurate and reliable alignment based upon detection of back reflection for ("contrast") off the topographical alignment marks.
For many processing operations, it is often desirous to have a substantially planar workpiece surface. To obtain topographical planarity of the workpiece surface, planarization methods such as chemi-mechanical polishing can be performed on the entire workpiece. The reasons for obtaining the topographical planarity of the workpiece surface, as well as the details of the various planarization methods, is beyond the scope of the present invention and will therefore not be further discussed.
As can be readily seen, the desire to have a substantially planar workpiece surface reduces or eliminates the number and size of the alignment marks. As a result, with a substantially planar workpiece surface, it becomes difficult, if not impossible, to obtain accurate and reliable workpiece alignment for subsequent operations. The conventional solution to this problem is to only partially polish a workpiece surface, thereby retaining some topographical bumps with which to align the workpiece. Therefore, the conventional solution requires the planarization method to achieve only marginal planarity. However, if the planarization method works too well, difficulties in alignment arise. Furthermore, if the planarization method works too poorly, the benefits of planarization are diminished.
Therefore, what is needed is a method for creating a substantially planar workpiece surface while still retaining reliable alignment marks.